A fast diagnosis method for interconnect fault in FPGA

As Field Programmable Gate Arrays (FPGAs) are being widely used, how to quickly diagnose FPGAs is becoming an important issue today. In this paper, we present a novel methodology to quickly diagnose FPGA interconnect faults. By adding maximum-length shift-registers in FPGA, all the testing configurations can be generated inside. The most time-consuming part of the testing, configuration bit-stream downloading, is not needed. Testing time is dramatically reduced. Large testing time reduction is achieved by introducing only a small circuit overhead.