DocumentCode
391894
Title
An analog mixed-signal test controller
Author
AbdEl-Halim, Mohammed Ali
Author_Institution
Mentor Consulting, Mentor Graphics, Cairo, Egypt
Volume
1
fYear
2002
fDate
4-7 Aug. 2002
Abstract
A design for test (DFT) technique for analog mixed-signal (AMS) system-on-a-chip (SoC) is presented; both methodology and implementation are introduced. Using the IEEE boundary scan standard 1149.4, small embedded analog test controller (ATC), and utilizes the embedded SoC memory. Using this structure almost any AMS-SoC can be tested for both manufacturing and on-line tests. This technique relaxes the tester requirements and enables cost effective on-line testing.
Keywords
IEEE standards; boundary scan testing; design for testability; embedded systems; integrated circuit testing; mixed analogue-digital integrated circuits; system-on-chip; IEEE 1149.4 standard; analog mixed-signal system-on-a-chip; boundary scan testing; design-for-test technique; embedded SOC memory; embedded analog test controller; manufacturing testing; on-line testing; Automatic testing; Circuit faults; Circuit testing; Controllability; Design for testability; Observability; Pins; Standards development; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN
0-7803-7523-8
Type
conf
DOI
10.1109/MWSCAS.2002.1187237
Filename
1187237
Link To Document