• DocumentCode
    391917
  • Title

    A high gain amplifier using a cascading architecture

  • Author

    Hashim, A.E. ; Geiger, R.L.

  • Author_Institution
    Iowa State Univ., Ames, IA, USA
  • Volume
    1
  • fYear
    2002
  • fDate
    4-7 Aug. 2002
  • Abstract
    High gain amplifiers with fast settling times are needed for high-speed data converter applications. Cascading amplifiers is generally a good way to achieve the desired open loop gain however; stability and settling speed become a concern. A cascading architecture that is inherently stable and maintains good settling performance was previously discussed. In this paper, a transistor level three stage implementation is presented that achieves over 100 dB of gain while maintaining good settling performance.
  • Keywords
    amplifiers; cascade networks; circuit stability; poles and zeros; 100 dB; cascading architecture; fast settling times; high gain amplifiers; high-speed data converter applications; open loop gain; settling performance; stability; transistor level three stage implementation; Bandwidth; Circuit stability; Feeds; Frequency; Negative feedback; Performance gain; Poles and zeros; Transfer functions; Transient response; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
  • Print_ISBN
    0-7803-7523-8
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2002.1187277
  • Filename
    1187277