• DocumentCode
    391929
  • Title

    Octilinear Steiner tree construction

  • Author

    Chiang, Ching-Shoei ; Ching-Shoei Chiang

  • Author_Institution
    Synopsys Inc., Mountain View, CA, USA
  • Volume
    1
  • fYear
    2002
  • fDate
    4-7 Aug. 2002
  • Lastpage
    603
  • Abstract
    There is a renewed interest on 45/spl deg/ geometry (4-geometry) after Simplex introduced X Architecture for its diagonal routing. Given a rectilinear Steiner tree T/sub 2/ = (V, E), we propose a O(|V| + |E|) algorithm to build an isomorphic octilinear Steiner tree T/sub 4/. Moreover, /spl omega/(T/sub 2/) - (/spl Rfr//sub e/ + /spl Rfr//sub /spl nu//) /spl omega/(T/sub 4/), where /spl omega/(T/sub 2/) and /spl omega/(T/sub 4/) are the total wirelength of T/sub 2/ and T/sub 4/, respectively. The /spl Rfr//sub e/ is the wirelength reduction from edge conversion and R, is the wirelength reduction by sliding degree three Steiner point. The /spl Rfr//sub e/ = /spl Sigma/i=1/sup |E|/ (2 - /spl radic/2) /spl times/ Min(/spl Delta/x/sub i/, /spl Delta/y/sub i/), where, /spl Delta/x/sub i/ and /spl Delta/y/sub i/ are horizontal and vertical wirelength for edge e/sub i/, e/sub i/ /spl isin/ E. The /spl Rfr//sub /spl nu// is the sum of wirelength reduction from sliding all degree three Steiner points. For each degree three Steiner point /spl nu/, /spl nu/ /spl isin/ V, the sliding reduces (3 - 2/spl radic/2) /spl times/ M in(/spl Delta//spl omega//sub 1/, /spl Delta//spl omega//sub 2/, /spl Delta//spl omega//sub 3/), where /spl Delta//spl omega//sub 1/, /spl Delta//spl omega//sub 2/ and /spl Delta//spl omega//sub 3/ are the wirelength of three wire segments connect to /spl nu/. Moreover, we prove the /spl omega/(T/sub 4/) obtained from our algorithm is the lower bound for T/sub 2/´s isomorphic 4-geometry Steiner tree. In the end, we show average 6.63% wirelength reduction on 15 designs by using our algorithm.
  • Keywords
    VLSI; circuit layout CAD; integrated circuit layout; network routing; trees (mathematics); wiring; Simplex; VLSI; diagonal routing; edge conversion; octilinear Steiner tree construction; sliding degree; total wirelength; wirelength reduction; Algorithm design and analysis; Geometry; Pins; Routing; Very large scale integration; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
  • Conference_Location
    Tulsa, OK, USA
  • Print_ISBN
    0-7803-7523-8
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2002.1187293
  • Filename
    1187293