Title :
A new multistage running-sum decimator
Author :
Jovanovic-Dolecek, G. ; Mitra, S.K.
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
Abstract :
This paper presents a new running-sum decimator for an even decimation factor. The decimator is designed as a cascade of an integrator and a differentiator making it possible to move the integrator section to a lower rate, which is half of the high input rate. The structure consists of three main sections: a cascade of first-order moving average filters, a cascade of integrators and a cascade of differentiators. With the aid of polyphase decomposition, the polyphase subfilters of the first section can be operated at a still lower rate.
Keywords :
FIR filters; cascade networks; differentiating circuits; integrating circuits; low-pass filters; FIR; cascaded integrator/differentiator; even decimation factor; first-order moving average filters; lowpass finite impulse response filter; multistage running-sum decimator; polyphase decomposition; polyphase subfilters; Finite impulse response filter; Frequency; Gain; Passband; Power dissipation; Sampling methods; Transfer functions;
Conference_Titel :
Circuits and Systems, 2002. MWSCAS-2002. The 2002 45th Midwest Symposium on
Print_ISBN :
0-7803-7523-8
DOI :
10.1109/MWSCAS.2002.1187303
