DocumentCode
392001
Title
A 1 V, 1.9 GHz folded dual-gate mixer in CMOS
Author
Ye, Song ; Lu, Ye
Author_Institution
SpaceBridge Semicond. Corp., Gatineau, Que., Canada
fYear
2002
fDate
17-19 Aug. 2002
Firstpage
175
Lastpage
178
Abstract
This paper describes a low-power folded dual-gate mixer implemented in a standard 0.25 μm CMOS process. The mixer exhibits 3.6 dB gain, -1 dBm IIP3, 12.5 dB noise figure operating at 1.9 GHz from a 1 V supply and with power dissipation of 4.5 mW.
Keywords
CMOS integrated circuits; MMIC mixers; UHF integrated circuits; UHF mixers; low-power electronics; 0.25 micron; 1 V; 1.9 GHz; 12.5 dB; 3.6 dB; 4.5 mW; CMOS; LC-tanks; RF circuits; folded dual-gate mixer; low-power electronics; portable telecommunications; power dissipation; CMOS technology; Capacitors; Impedance matching; Inductors; Integrated circuit technology; Noise figure; Power dissipation; Radio frequency; Virtual colonoscopy; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave and Millimeter Wave Technology, 2002. Proceedings. ICMMT 2002. 2002 3rd International Conference on
Print_ISBN
0-7803-7486-X
Type
conf
DOI
10.1109/ICMMT.2002.1187663
Filename
1187663
Link To Document