Title :
A simple yet accurate analytical method for reducing CMOS gates to equivalent inverters
Author :
Taherzadeh-S, M. ; Iman-Eini, H. ; Amelifard, B. ; Farazian, M. ; Afzali-Kusha, Ali ; Nourani, M.
Author_Institution :
Electr. & Comput. Eng. Dept., Tehran Univ., Iran
Abstract :
This paper presents a novel fully-analytical approach to reduce a CMOS NAND gate to an equivalent inverter, based on the modified n-th power law MOSFET model. The series-connected transistors in the NAND gate are converted to an equivalent transistor in a two step process. The proposed model is useful for design automation of complex gates used in VLSI circuits. To show the validity of the technique, the calculated output waveform of the equivalent inverter is compared with that of the NAND gate using HSPICE simulations (level 49).
Keywords :
CMOS logic circuits; MOSFET; VLSI; circuit CAD; equivalent circuits; integrated circuit design; logic CAD; logic gates; semiconductor device models; CMOS gates; NAND gate; VLSI circuits; analytical method; complex gates; design automation; equivalent inverters; equivalent transistor; modified n-th power law MOSFET model; series-connected transistors; CMOS integrated circuits; Capacitance; Design automation; Equations; Integrated circuit modeling; Inverters; MOSFET circuits; Power MOSFET; Power engineering computing; Semiconductor device modeling;
Conference_Titel :
Mixed-Signal Design, 2003. Southwest Symposium on
Print_ISBN :
0-7803-7778-8
DOI :
10.1109/SSMSD.2003.1190408
