Parallel Simulation of Large Linear Circuits With Nonlinear Terminations Using High-Order Stable Methods

To meet the growing demand for efficient circuit simulation tools, Obreshkov formula (ObF)-based high-order integration methods were recently proposed. However, one of the challenges in this method is the growing computational cost of the solution at a particular time point with the increasing orders of the ObF. To address this issue and target high-speed circuits with large linear blocks and nonlinear loads, a new parallel framework is proposed in this paper to minimize the CPU time associated with the solution at any time point. For this purpose, recently identified special properties of the resulting circuit matrices and the node-tearing principles are exploited, while developing an efficient parallel simulation framework. Numerical examples are presented to demonstrate the validity and efficiency of the proposed parallel method.