DocumentCode :
393383
Title :
RCLK-VJ network reduction with Hurwitz polynomial approximation
Author :
Qin, Zhanhai ; Cheng, Chung-Kuan
Author_Institution :
Dept. of Comput. Sci. & Eng., California Univ. San Diego, La Jolla, CA, USA
fYear :
2003
fDate :
21-24 Jan. 2003
Firstpage :
283
Lastpage :
291
Abstract :
We propose a new linear network reduction algorithm based on a generalized Y-Δ transformation technique in s-domain. Resultant admittance is kept as a rational function of s with a dramatically reduced order. Yet it preserves low-order terms of exact admittance evaluated with traditional symbolic analysis. Stability of transfer functions derived from reduced-order admittance is guaranteed via a Hurwitz polynomial approximation. Such low-order transfer functions are used in pole analysis and time domain waveform evaluation in response to any input signal.
Keywords :
VLSI; circuit simulation; integrated circuit modelling; poles and zeros; polynomial approximation; symbol manipulation; time-domain analysis; transfer functions; Hurwitz polynomial approximation; RCLK-VJ network reduction; generalized Y-Δ transformation technique; linear network reduction algorithm; low-order terms; low-order transfer functions; pole analysis; rational function; s-domain; symbolic analysis; time domain waveform evaluation; transfer functions; Admittance; Computer science; Drives; Integrated circuit interconnections; Performance analysis; Polynomials; SPICE; Signal analysis; Stability; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN :
0-7803-7659-5
Type :
conf
DOI :
10.1109/ASPDAC.2003.1195030
Filename :
1195030
Link To Document :
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