DocumentCode
394946
Title
Processor-memory interconnection issues for multiprocessor systems
Author
Chan, Hao-po ; Stouraitis, Thanos
Author_Institution
The Ohio State University
Volume
1
fYear
1989
fDate
1989
Firstpage
12
Lastpage
16
Keywords
Delay; Hardware; Intelligent networks; Joining processes; Multiprocessing systems; Multiprocessor interconnection networks; Performance analysis; Probability; Statistical distributions; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 1989. Twenty-Third Asilomar Conference on
Print_ISBN
0-929029-30-1
Type
conf
DOI
10.1109/ACSSC.1989.1200740
Filename
1200740
Link To Document