DocumentCode :
396300
Title :
Modeling of accumulation MOS capacitors for high performance analog circuits
Author :
Otin, A. ; Celma, S. ; Aldea, C.
Author_Institution :
Fac. de Ciencias, Zaragoza Univ., Spain
Volume :
1
fYear :
2003
fDate :
25-28 May 2003
Abstract :
A physical-based model for MOS capacitors in accumulation is presented, which is able to predict the non-linear distortion accurately. The key idea of this work is to include the polysilicon gate depletion effect in that model. Several test structures based on MOS capacitors in accumulation have been implemented with the aim of validating the model and to explore the potential applications to high performance analog circuits fabricated in pure digital CMOS technologies. The model shows good agreement with experimental results.
Keywords :
CMOS analogue integrated circuits; MOS capacitors; integrated circuit modelling; integrated circuit testing; nonlinear distortion; Si; VLSI; accumulation MOS capacitor model; digital CMOS technologies; high performance analog circuits; model validation; nonlinear distortion; physical-based model; polysilicon gate depletion effect; test structures; Analog circuits; CMOS digital integrated circuits; CMOS process; CMOS technology; Capacitance; Circuit testing; MOS capacitors; MOSFETs; Nonlinear distortion; Semiconductor device modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
Type :
conf
DOI :
10.1109/ISCAS.2003.1205486
Filename :
1205486
Link To Document :
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