Title :
A 1-V CMOS output stage with high linearity
Author :
Aloisi, W. ; Giustolisi, G. ; Palumbo, G.
Author_Institution :
Catania Univ., Italy
Abstract :
A CMOS low-voltage output stage based on a push-pull topology is proposed. It is driven by a differential signal and its symmetric topology provides excellent intrinsic linearity. It can work with a power supply as low as 1 V and when loaded with a 500-Ω resistor it exhibits negligible even harmonic components whilst odd components are maintained well below -20 dB up to 900 mVpp of the output signal. Moreover, the output stage includes a simple current control which accurately sets the bias condition.
Keywords :
CMOS analogue integrated circuits; differential amplifiers; harmonic distortion; low-power electronics; 1 V; 500 ohm; CMOS low-voltage output stage; current control; differential signal; harmonic distortion; linearity; push-pull topology; symmetric topology; CMOS analog integrated circuits; Circuit topology; Current control; Driver circuits; Feedback circuits; Linearity; Power supplies; Power system harmonics; Resistors; Voltage;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1205541
