DocumentCode :
396390
Title :
An arbitrarily skewable multiphase clock generator combining direct interpolation with phase error average
Author :
Yang, Lixin ; Yuan, Jiren
Author_Institution :
Dept. of Electroscience, Lund Univ., Sweden
Volume :
1
fYear :
2003
fDate :
25-28 May 2003
Abstract :
A multiphase clock generator based on direct phase interpolation is presented. No feedback loop is required. A simple phase interpolation architecture is proposed, in which the two phase-adjacent signals are interpolated by using a series of resistors via inverters´ discharging or charging slopes to generate multiphase outputs in a single stage. A phase error averaging circuit is used to correct interphase errors. The multiphase clock generator has been fabricated in a standard 0.35 μm, 3.3 V CMOS process. The measured performance shows it can operate at the input clock frequencies from 300 MHz to 600 MHz and has the rms jitter of 6 ps at 500 MHz.
Keywords :
CMOS digital integrated circuits; clocks; error correction; high-speed integrated circuits; interpolation; pulse generators; synchronisation; timing circuits; 0.35 micron; 3.3 V; 300 to 600 MHz; CMOS process; arbitrarily skewable multiphase clock generator; direct phase interpolation; phase error averaging circuit; phase interpolation architecture; CMOS process; Circuits; Clocks; Error correction; Feedback loop; Frequency measurement; Interpolation; Inverters; Resistors; Signal generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
Type :
conf
DOI :
10.1109/ISCAS.2003.1205646
Filename :
1205646
Link To Document :
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