Title :
An 8-bit, 1.8 V, 20 MSample/s analog-to-digital converter using low gain opamps
Author :
Beck, D.R. ; Allstot, D.J. ; Garrity, D.
Author_Institution :
Univ. of Washington, Seattle, WA, USA
Abstract :
This paper describes the design of a pipeline analog-to-digital converter (ADC). Using a minimalist approach to circuit design, combined with novel double-sampling and digital error correction techniques, a high-speed, low-voltage ADC is realized that achieves 8 bit resolution at 20 Ms/s. Implemented in 0.25 μm CMOS with an area of 0.36 mm2, it dissipates 18 mW at 1.8 V.
Keywords :
CMOS integrated circuits; analogue-digital conversion; circuit simulation; error correction; integrated circuit design; low-power electronics; operational amplifiers; pipeline processing; signal sampling; 0.25 micron; 1.8 V; 18 mW; 8 bit; ADC resolution; CMOS ADC; analog-to-digital converter; digital error correction; double-sampling; high-speed ADC; low gain opamps; low-voltage ADC; pipeline ADC; Analog-digital conversion; Circuit noise; Circuit synthesis; Clocks; Electronics industry; Error correction; Low voltage; Pipelines; Semiconductor device noise; Topology;
Conference_Titel :
Circuits and Systems, 2003. ISCAS '03. Proceedings of the 2003 International Symposium on
Print_ISBN :
0-7803-7761-3
DOI :
10.1109/ISCAS.2003.1205698
