DocumentCode
397095
Title
Static use of locking caches vs. dynamic use of locking caches for real-time systems
Author
Campoy, A. Martí ; Perles, Angel ; Rodriguez, F. ; Busquets-Mataix, J.V.
Author_Institution
Dept. de Inf. de Sistemas y Computadores, Univ. Politecnica de Valencia, Spain
Volume
2
fYear
2003
fDate
4-7 May 2003
Firstpage
1283
Abstract
Locking caches are a useful alternative to standard cache memories in order to reach both predictability and high performance for multitasking, preemptive, fixed-priority real-time systems. Two schemes of locking cache are possible: static and dynamic use. Both schemas present a high degree of predictability and like-cache performance. But these two schemes are not equivalent. Each one performs better for systems with particular characteristics. This work show that static use presents a greater degree of predictability than dynamic use, but dynamic use offers better performance for the major part of the cases. Systems are grouped as a function of the relationship between cache size and code size, allowing a fast and easy prediction about the gain or loss of performance given by each use of locking caches.
Keywords
cache storage; multiprogramming; real-time systems; cache memory; dynamic locking caches; multitasking; predictability; real-time systems; schedulability analysis; static locking caches; Cache memory; Delay; Genetic algorithms; Multitasking; Performance analysis; Performance gain; Processor scheduling; Proposals; Real time systems; Resumes;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Computer Engineering, 2003. IEEE CCECE 2003. Canadian Conference on
ISSN
0840-7789
Print_ISBN
0-7803-7781-8
Type
conf
DOI
10.1109/CCECE.2003.1226134
Filename
1226134
Link To Document