New scanning technique for the power management of pixel array

The performance demands of low power consumption for embedded systems are motivating new approaches to manage power dissipations issues. The power budget of displaying images is one of the major issues of hand-held devices. In this paper, we propose a new algorithm together with its display scanning technique and corresponding power efficient architecture. This algorithm enables to equalize the display power consumption and to reduce the peak demands to the minimum values. After processing the image, we dispatch it by a specific scanning display. Which allows to obtain a real-time smoothing of the display power consumption. The algorithm has been implemented with a flexible and modular architecture based on the bitonic sorting. Integration on a ARM9-VIRTEX XCV2000E rapid-prototyping platform have demonstrated the expected performances.