Title :
BIST-diagnosis of interconnect fault locations in FPGA´s
Author :
Liu, J. ; Simmons, S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Queen´´s Univ., Canada
Abstract :
This paper presents a built-in self-test (BIST) diagnosis approach for FPGA interconnect. The proposed scheme has 100% fault coverage on wire segment stuck-at, stuck-open and bridging faults and programmable switch stuck on/off faults. Moreover, a single interconnect fault inside a Xilinx XC4020E is shown to be diagnosable within approximately 1 second using our approach.
Keywords :
built-in self test; fault location; field programmable gate arrays; integrated circuit interconnections; integrated circuit testing; BIST diagnosis; FPGA interconnect; Xilinx XC4020E; built-in self-test diagnosis; fault detection; fault diagnosis; fault locations; field programmable gate array; Built-in self-test; Circuit faults; Circuit testing; Fault detection; Fault diagnosis; Field programmable gate arrays; Integrated circuit interconnections; Logic; Switches; Wire;
Conference_Titel :
Electrical and Computer Engineering, 2003. IEEE CCECE 2003. Canadian Conference on
Print_ISBN :
0-7803-7781-8
DOI :
10.1109/CCECE.2003.1226379
