• DocumentCode
    397234
  • Title

    A Trimaran based framework for exploring the design space of VLIW ASIPs with coarse grain functional units

  • Author

    Middha, Bhuvan ; Raj, Varun ; Gangwar, Anup ; Kumar, Anshul ; Balakrishnan, M. ; Ienne, Paolo

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Delhi, India
  • fYear
    2002
  • fDate
    2-4 Oct. 2002
  • Firstpage
    2
  • Lastpage
    7
  • Abstract
    It is widely accepted that use of an Application Specific Instruction Set Processor (ASIP) in an embedded system can provide a solution which is much more flexible than ASICs and much more efficient than standard processors in terms of performance and power consumption. However a lack of an acceptable design methodology and supporting tools for ASIPs limits their use even today. We present in this paper a methodology for design space exploration of high performance VLIW ASIPs by modeling Application Specific Functional Units in Trimaran Compiler Infrastructure. To demonstrate the effectiveness of our strategy we consider two important applications FFT and Kalman Filter and perform compute intensive operations in these applications via special Functional Units. The results we obtain are very promising with up to 2/spl times/ speed improvement.
  • Keywords
    computer architecture; instruction sets; performance evaluation; program compilers; ASIP; Application Specific Instruction Set Processor; Trimaran Compiler Infrastructure; VLIW ASIPs; design space exploration; high performance; Application specific processors; Computer architecture; Computer science; Design methodology; Embedded system; Permission; Registers; Space exploration; Space technology; VLIW;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System Synthesis, 2002. 15th International Symposium on
  • Conference_Location
    Kyoto, Japan
  • Print_ISBN
    1-58113-576-9
  • Type

    conf

  • Filename
    1227143