DocumentCode
397634
Title
The hardware structure design of perceptron with FPGA implementation
Author
Qinruo, Wang ; Bo, Yi ; Yun, Xie ; Bingru, Liu
Author_Institution
Fac. of Autom., Guangdong Univ. of Technol., China
Volume
1
fYear
2003
fDate
5-8 Oct. 2003
Firstpage
762
Abstract
Most commonly, neural networks models or algorithms are simulated and implemented by computer programming in neural networks theory research. But in many practical applications, it is necessary to consider essential issues such as hardware implementation. Specific application of neural networks hardware has the advantages of high speed, small in size, good performance and low cost. Thus, the implementation of high performance neural networks hardware is the final target in some actual applications. In this paper, a hardware structure of single perceptron that serves as the basic nerve cell and its implementation method with FPGA is introduced. It is based on VLSI implementation approach for the standard neural networks. The method proposed is a primary discussion and research for the hardware implementation of artificial neural networks.
Keywords
VLSI; field programmable gate arrays; neural chips; perceptrons; FPGA; VLSI; basic nerve cell; computer programming; field programmable gate array; hardware structure design; neural network; perceptron; very large scale integration; Application software; Artificial neural networks; Computational modeling; Computer simulation; Costs; Field programmable gate arrays; Neural network hardware; Neural networks; Programming; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems, Man and Cybernetics, 2003. IEEE International Conference on
ISSN
1062-922X
Print_ISBN
0-7803-7952-7
Type
conf
DOI
10.1109/ICSMC.2003.1243906
Filename
1243906
Link To Document