Title :
A dual 10b 200MSPS pipeline D/A converter with DLL-based clock synthesizer
Author :
Manganaro, G. ; Kwak, S.-U. ; Bugeja, A.R.
Author_Institution :
Engim Inc, Acton, MA, USA
Abstract :
A dual 10b/200MSPS pipeline digital to analog converter (DAC) suitable for communication applications is here presented. It has been designed using a 4-metal level 3.3 V 0.5 μm BiCMOS technology and operates on a 3-phase clock synthesized by an on-chip delay locked loop (DLL). The DAC shows 9.7 effective bits and 69.4 dB of spurious free dynamic range for a synthesized sine wave of 2 Vpp at 34 MHz and output rate of 200 MSPS. The 2 DACs and DLL occupy a total area of 3 mm2 and consume 693 mW at full-speed.
Keywords :
BiCMOS integrated circuits; clocks; delay lock loops; digital-analogue conversion; integrated circuit design; integrated circuit measurement; pipeline processing; 0.5 micron; 10 bit; 2 V; 3.3 V; 34 MHz; 693 mW; DAC; DLL-based clock synthesizer; communication applications; effective bits; four-metal level BiCMOS technology; on-chip delay locked loop; output rate; pipeline D/A converter; pipeline digital to analog converter; power consumption; spurious free dynamic range; synthesized sine wave; BiCMOS integrated circuits; Clocks; Digital-analog conversion; Linearity; MOS capacitors; Pipelines; Sampling methods; Switches; Synthesizers; Voltage;
Conference_Titel :
Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003
Print_ISBN :
0-7803-7842-3
DOI :
10.1109/CICC.2003.1249434
