Title :
Bus-Driven Floorplanning
Author :
Hua Xiang ; Tang, Xiaoping ; Wong, Martin D F
Author_Institution :
CS Dept., UIUC, Urbana, IL, USA
Abstract :
In this paper, we present an integrated approach to floorplanning and bus planning, i.e., bus-driven floorplanning (BDF). We are given a set of circuit blocks and the bus specifications (i.e., the net list of blocks for the buses). A feasible BDF solution is a placement of all circuit blocks such that each bus can be realized as a rectangular strip (horizontal or vertical) going through all the blocks connected by the bus. The objective is to determine a feasible BDF solution that minimizes floorplan area and total bus area. Our approach is based upon the sequence-pair floorplan representation. After a careful analysis of the relationship between bus ordering and block ordering in the floorplan represented by a sequence pair, we derive feasibility conditions on sequence pairs that give feasible BDF solutions. Experimental results demonstrate the efficiency and effectiveness of our algorithm.
Keywords :
circuit layout; simulated annealing; system buses; BDF solution; block ordering; bus driven floorplanning; bus ordering; bus planning; bus specifications; circuit blocks; circuit optimisation; sequence pair floorplan representation; Artificial intelligence; Benchmark testing; Circuits; Permission; Routing; Strips; Urban planning;
Conference_Titel :
Computer Aided Design, 2003. ICCAD-2003. International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
1-58113-762-1
DOI :
10.1109/ICCAD.2003.159672