DocumentCode :
400779
Title :
Statistical timing analysis considering spatial correlations using a single PERT-like traversal
Author :
Chang, Hongliang ; Sapatnekar, Sachin S.
Author_Institution :
Dept. of Comput. Sci. & Eng., Minnesota Univ., Minneapolis, MN, USA
fYear :
2003
fDate :
9-13 Nov. 2003
Firstpage :
621
Lastpage :
625
Abstract :
We present an efficient statistical timing analysis algorithm that predicts the probability distribution of the circuit delay while incorporating the effects of spatial correlations of intra-die parameter variations, using a method based on principal component analysis. The method uses a PERT-like circuit graph traversal, and has a run-time that is linear in the number of gates and interconnects, as well as the number of grid partitions used to model spatial correlations. On average, the mean and standard deviation values computed by our method have errors of 0.2% and 0.9%, respectively, in comparison with a Monte Carlo simulation.
Keywords :
delay circuits; graphs; principal component analysis; statistical analysis; statistical distributions; timing circuits; Monte Carlo simulation; PERT-like circuit graph traversal; circuit delay; grid partitions; mean values; principal component analysis; probability distribution; spatial correlations; standard deviation values; statistical timing analysis algorithm; Algorithm design and analysis; Circuit analysis; Circuit optimization; Computer science; Delay estimation; Distributed computing; Integrated circuit interconnections; Permission; Prediction algorithms; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Aided Design, 2003. ICCAD-2003. International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
1-58113-762-1
Type :
conf
DOI :
10.1109/ICCAD.2003.159746
Filename :
1257875
Link To Document :
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