DocumentCode
400785
Title
Mixed signal DFT: a concise overview
Author
Kaminska, B. ; Arabi, Karim
fYear
2003
fDate
9-13 Nov. 2003
Firstpage
672
Lastpage
679
Abstract
Practical mixed-signal DFT solutions are presented with an emphasis on performance, cost, and test coverage. Special consideration is given to the possible DFT techniques for Phase-Locked Loops (PLLs) with associated implications on test coverage, performance, cost, and time to market. An introduction to practical DFT techniques for data converters (A/D and D/A) follow. An overview of IEEE P1149.4 analog test bus standard concludes the embedded tutorial.
Keywords
IEEE standards; analogue-digital conversion; design for testability; digital-analogue conversion; phase locked loops; IEEE P1149.4 analog test bus standard; PLL; analog-digital converters; data converters; design-for-test; digital-analog converters; mixed signal DFT solutions; phase locked loops; Circuit faults; Circuit testing; Clocks; Costs; Design for testability; Jitter; Permission; Phase locked loops; System-on-a-chip; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Aided Design, 2003. ICCAD-2003. International Conference on
Conference_Location
San Jose, CA, USA
Print_ISBN
1-58113-762-1
Type
conf
DOI
10.1109/ICCAD.2003.159752
Filename
1257882
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