Process control issues for retrograde well implants for narrow n+/p+ isolation in CMOS

Shallow trench isolation (STI) is being scaled down in both width and depth to increase device packing densities. Critical to the success of interwell isolation is the accurate placement of the n-well/p-well junction in the center of the region below the STI oxide. Zero degree implants avoid shadowing effects from resist features but can reduce process robustness due to channeling-induced profile variations. The shape of dopant profiles near 0° tilt vary significantly with tilt angle changes too small to control on even advanced ion implanters. We modeled 150nm devices with a 380nm n+/p+ spacing and show that these profile variations lead to significant shifts in transistor threshold voltage and n-well to n+ leakage. We calibrated our simulator with SIMS data to accurately model transistor and interwell breakdown performance for 0° well implants for the first time. We also modeled the same structures made with implants at 3° tilt using quad repositioning. Low angle quad implants for retrograde wells eliminate shadowing effects while delivering superior process robustness as compared to 0° well implants.