A SystemC-based verification methodology for complex wireless software IP

The implementation of a complex hardware intellectual property (IP) together with complex lower-level software and the integration into a system platform poses tough challenges to the design and verification engineers. Traditionally, embedded software is developed and tested towards the end of the development cycle because of late availability of lab prototype equipment and hardware IP. In this paper, a "software-centric" hardware/software implementation and verification methodology for a 3G WCDMA modem is presented, with emphasis on physical layer software design and early verification. The subsystem architecture of 3G hardware and software is presented along with design and verification steps carried out. A versatile SystemC-based test environment is described, which links test case modules producing the stimuli from protocol stack and hardware components to the L1 SW code, executed on a instruction set simulator.