DocumentCode
403538
Title
Early SEU fault injection in digital, analog and mixed signal circuits: a global flow
Author
Leveugle, R. ; Ammari, A.
Author_Institution
TIMA Lab., Grenoble, France
Volume
1
fYear
2004
fDate
16-20 Feb. 2004
Firstpage
590
Abstract
Fault injection techniques have been proposed for years to early analyze the dependability characteristics of digital circuits. Very few attempts have however been reported to perform the same task in analog parts. Furthermore, these attempts are all based on parametric variations. With the increasing number of mixed signal circuits, a unified approach becomes mandatory to globally validate the digital and analog parts, while taking into account real faults occurring in the field, e.g. SEUs. In this paper, a global analysis flow is proposed, based on a high-level model of the circuit. The possibility to inject transient faults in the different parts is discussed. The results obtained on a case study are reported to show the feasibility of the injection in analog blocks.
Keywords
analogue integrated circuits; digital integrated circuits; fault simulation; integrated circuit reliability; integrated circuit testing; mixed analogue-digital integrated circuits; transient analysis; SEU fault injection; analog circuits; digital circuits; global analysis flow; high-level circuit model; mixed signal circuits; single event upsets; transient fault injection; CMOS technology; Circuit analysis; Circuit faults; Circuit simulation; Circuit testing; Performance analysis; Protection; Single event upset; Space technology; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2085-5
Type
conf
DOI
10.1109/DATE.2004.1268909
Filename
1268909
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