DocumentCode
403544
Title
Flexible software protection using hardware/software codesign techniques
Author
Zambreno, Joseph ; Choudhary, Alok ; Simha, Rahul ; Narahari, Bhagirath
Author_Institution
Dept. of Electr. & Comput. Eng., Northwestern Univ., Evanston, IL, USA
Volume
1
fYear
2004
fDate
16-20 Feb. 2004
Firstpage
636
Abstract
A strong level of trust in the software running on an embedded processor is a prerequisite for its widespread deployment in any high-risk system. The expanding field of software protection attempts to address the key steps used by hackers in attacking a software system. In this paper we present an efficient and tunable approach to some problems in embedded software protection that utilizes a hardware/software codesign methodology. By coupling our protective compiler techniques with reconfigurable hardware support, we allow for a greater flexibility of placement on the security-performance spectrum than previously proposed mainly-hardware or software approaches. Results show that for most of our benchmarks, the average performance penalty of our approach is less than 20%, and that this number can be greatly improved upon with the proper utilization of compiler and architectural optimizations.
Keywords
embedded systems; hardware-software codesign; integrated circuit design; reconfigurable architectures; architectural optimizations; embedded processor; embedded software protection; hardware-software codesign; networking capabilities; protective compiler techniques; reconfigurable hardware support; security-performance spectrum; software system; Computer hacking; Computer science; Cryptography; Embedded computing; Embedded software; Field programmable gate arrays; Hardware; Optimizing compilers; Software protection; Software systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2085-5
Type
conf
DOI
10.1109/DATE.2004.1268916
Filename
1268916
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