Communication analysis for system-on-chip design

In this paper we present an approach for analysis of systems of parallel, communicating processes for SoC design. We present a method to detect communications that synchronize the program flow of two or more processes. These synchronization points set the processes into relation and allow the determination of the global timing behavior of such a system. Using the results of our method for communication analysis, we present a new method to detect communications that might produce conflicts on shared communication resources. This information can be used for the assignment of communication resources.