DocumentCode
403553
Title
Co-processor synthesis: a new methodology for embedded software acceleration
Author
Hounsell, Ben ; Taylor, Richard
Author_Institution
Critical Blue Ltd., Edinburgh, UK
Volume
1
fYear
2004
fDate
16-20 Feb. 2004
Firstpage
682
Abstract
This paper introduces co-processor synthesis - a methodology that provides design benefits by implementing hardware co-processors directly from embedded software. The paper examines the design benefits in this new approach vs. behavioral synthesis and configurable processor methodologies.
Keywords
embedded systems; hardware-software codesign; microprocessor chips; configurable processor methodologies; coprocessor synthesis; embedded software acceleration; Acceleration; Application software; Coprocessors; Design methodology; Electronic design automation and methodology; Embedded software; Hardware; Parallel processing; Software standards; Software tools;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2085-5
Type
conf
DOI
10.1109/DATE.2004.1268929
Filename
1268929
Link To Document