DocumentCode
403573
Title
Modeling and simulating memory hierarchies in a platform-based design methodology
Author
Viana, Pablo ; Barros, Edna ; Rigo, Sandro ; Azevedo, Rodolfo ; Araujo, Guido
Author_Institution
CIn, UFPE, Recife, Brazil
Volume
1
fYear
2004
fDate
16-20 Feb. 2004
Firstpage
734
Abstract
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to capture the processor description as well as the memory subsystem configuration, this environment offers support for system-level specification, intended for platform-based design. As a case study, it is presented the memory architecture exploration for a simple image processing application, yet a more robust environment evaluation is performed through the execution of some real-world benchmarks.
Keywords
C language; formal specification; hardware description languages; image processing; memory architecture; ArchC; SystemC; architecture description language; architecture specification; image processing; memory architecture exploration; memory hierarchy modeling; memory hierarchy simulation; memory subsystem configuration; platform-based design; processor description; programmable systems; system-level specification; Architecture description languages; Costs; Design methodology; Digital systems; Image processing; Memory architecture; Performance evaluation; Power system modeling; Robustness; Software performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2085-5
Type
conf
DOI
10.1109/DATE.2004.1268953
Filename
1268953
Link To Document