DocumentCode
403604
Title
Measurement of IP qualification costs and benefits
Author
Vörg, Andreas ; Radetzki, Martin ; Rosenstiel, Wolfgang
Author_Institution
Microelectron. Syst. Design, FZI Karlsruhe, Germany
Volume
2
fYear
2004
fDate
16-20 Feb. 2004
Firstpage
996
Abstract
IP core reuse is necessary to overcome the design gap. Yet experience during IP integration has shown that risk is still considerably high when dealing with IPs. IP qualification provides IP providers and integrators with measurable quality characteristics that allow for high quality IP cores and to put buy decisions on a quantifiable basis. This paper presents unprecedented results that facilitate the comparison of the effectiveness of reusing qualified, digital soft IP to previous, immature reuse methods. An impressive reduction in IP integration effort, which is profitable for the IP customer, is demonstrated. Moreover, we show that the IP business can be profitable for the IP provider despite the additional qualification effort.
Keywords
electronic design automation; industrial property; integrated circuit design; system-on-chip; digital soft intellectual property; electronic design automation; integrated circuit design; intellectual property business; intellectual property core; intellectual property customer; intellectual property integration; intellectual property qualification; system-on-chip; Consumer electronics; Design methodology; Electronic design automation and methodology; Intellectual property; Microelectronics; Moore´s Law; Productivity; Qualifications; System-on-a-chip; Time to market;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
ISSN
1530-1591
Print_ISBN
0-7695-2085-5
Type
conf
DOI
10.1109/DATE.2004.1269023
Filename
1269023
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