• DocumentCode
    403674
  • Title

    CMOS structures suitable for secured hardware

  • Author

    Guilley, Sylvain ; Hoogvorst, Philippe ; Mathieu, Yves ; Pacalet, Renaud ; Provost, Jean

  • Author_Institution
    Dept. Commun. et Electron., CNRS, Paris, France
  • Volume
    2
  • fYear
    2004
  • fDate
    16-20 Feb. 2004
  • Firstpage
    1414
  • Abstract
    Unsecured electronic circuits leak physical syndromes correlated to the data they handle. Side-channels attacks, like SPA or DPA, exploit this information leakage. We provide balanced and memoryless CMOS structures for a 2-input secured NAND gate.
  • Keywords
    CMOS integrated circuits; MOSFET; logic gates; memoryless systems; NAND gate; complementary metal-oxide-semiconductor; data correlation; information leakage; memoryless CMOS structures; metal-oxide-semiconductor field effect transistor; physical syndromes; secured hardware; unsecured electronic circuits; Cryptography; Electronic circuits; Encoding; Hardware; Information retrieval; Logic design; Microelectronics; Performance evaluation; Protocols; Rails;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
  • ISSN
    1530-1591
  • Print_ISBN
    0-7695-2085-5
  • Type

    conf

  • DOI
    10.1109/DATE.2004.1269113
  • Filename
    1269113
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=403674