DocumentCode :
403796
Title :
Path delay test generation for domino logic circuits in the presence of crosstalk
Author :
Kundu, Rahul ; Blanton, R.D.
Author_Institution :
Carnegie Mellon University
Volume :
1
fYear :
2003
fDate :
Sept. 30-Oct. 2, 2003
Firstpage :
122
Lastpage :
130
Keywords :
Circuit testing; Crosstalk; Delay effects; Hazards; Iterative algorithms; Logic circuits; Logic testing; Semiconductor device testing; Silicon; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2003. Proceedings. ITC 2003. International
ISSN :
1089-3539
Print_ISBN :
0-7803-8106-8
Type :
conf
DOI :
10.1109/TEST.2003.1270832
Filename :
1270832
Link To Document :
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