DocumentCode

403831

Title

Double-tree scan: a novel low-power scan-path architecture

Author

Bhattacharya, Bhargab B. ; Seth, Sharad C. ; Zhang, Sheng

Author_Institution

University of Nebraska-Lincoln

Volume

1

fYear

2003

fDate

Sept. 30-Oct. 2, 2003

Firstpage

470

Lastpage

479

Keywords

Automatic testing; Built-in self-test; Circuit testing; Clocks; Computer architecture; Flip-flops; Logic design; Logic devices; Minimization; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2003. Proceedings. ITC 2003. International

ISSN

1089-3539

Print_ISBN

0-7803-8106-8

Type

conf

DOI

10.1109/TEST.2003.1270872

Filename

1270872