• DocumentCode
    403832
  • Title

    Efficient scan chain design for power minimization during scan testing under routing constraint

  • Author

    Borthomme, Y. ; Girard, P. ; Guiller, L. ; Landrault, C. ; Pravossoudovitch, S.

  • Author_Institution
    Snopsys Inc.
  • Volume
    1
  • fYear
    2003
  • fDate
    Sept. 30-Oct. 2, 2003
  • Firstpage
    488
  • Lastpage
    493
  • Keywords
    Circuit testing; Degradation; Design for testability; Energy consumption; Joining processes; Logic testing; Minimization; Routing; System testing; Uniform resource locators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2003. Proceedings. ITC 2003. International
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-8106-8
  • Type

    conf

  • DOI
    10.1109/TEST.2003.1270874
  • Filename
    1270874