Title :
Using logic models to predict the detection behavior of statistical timing defects
Author :
Wang, L.-C. ; Krstic, A. ; Lee, Lun-Hui ; Kwang-Ting Cheng
Author_Institution :
Synopsys, Inc.
fDate :
Sept. 30-Oct. 2, 2003
Keywords :
Circuit faults; Circuit noise; Circuit simulation; Delay effects; Electrical fault detection; Fault detection; Logic testing; Manufacturing processes; Predictive models; Timing;
Conference_Titel :
Test Conference, 2003. Proceedings. ITC 2003. International
Print_ISBN :
0-7803-8106-8
DOI :
10.1109/TEST.2003.1271092
