DocumentCode

403920

Title

Fpga interconnect delay fault testing

Author

Chmelaf, E.

Author_Institution

Center for Reliable Computing, Stanford University

Volume

1

fYear

2003

fDate

Sept. 30-Oct. 2, 2003

Firstpage

1239

Lastpage

1247

Keywords

Circuit faults; Circuit testing; Computer networks; Delay; Fault detection; Field programmable gate arrays; Logic testing; Routing; Switches; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2003. Proceedings. ITC 2003. International

ISSN

1089-3539

Print_ISBN

0-7803-8106-8

Type

conf

DOI

10.1109/TEST.2003.1271113

Filename

1271113