Title :
Reliability threats in VDSM - shortcomings in conventional test and fault tolerance alternatives
Author_Institution :
iRoC Technologies
fDate :
Sept. 30-Oct. 2, 2003
Keywords :
Circuit faults; Circuit testing; Clocks; Fault tolerance; Latches; Logic devices; Neutrons; Pulse circuits; Single event upset; Timing;
Conference_Titel :
Test Conference, 2003. Proceedings. ITC 2003. International
Print_ISBN :
0-7803-8106-8
DOI :
10.1109/TEST.2003.1271122
