Title :
Yield threats and inadequacy of one-time test
Author_Institution :
Virage Logic Corporation
fDate :
Sept. 30-Oct. 2, 2003
Keywords :
Crosstalk; Fabrication; Failure analysis; Logic testing; Manufacturing; Production; Redundancy; Semiconductor device manufacture; Semiconductor device reliability; Silicon;
Conference_Titel :
Test Conference, 2003. Proceedings. ITC 2003. International
Print_ISBN :
0-7803-8106-8
DOI :
10.1109/TEST.2003.1271124
