DocumentCode :
404181
Title :
Impact of asymmetric metal coverage on high performance MOSFET mismatch
Author :
Fukumoto, Jay ; Burleson, Jeff ; Das, Tejasvi ; Moon, J.E. ; Mukund, P.R.
Author_Institution :
LSI Logic Corp., Menlo Park, CA, USA
fYear :
2003
fDate :
10-12 Dec. 2003
Firstpage :
478
Lastpage :
479
Abstract :
This paper presents a comprehensive study of the impact of asymmetric metal coverage on matched high performance MOSFET pairs for applications. Test structures were fabricated on LSI 0.18 μm technology, and measurement results are presented on the impact of a asymmetric coverage of five aluminium metal layers on the transistor pairs.
Keywords :
MOSFET; large scale integration; semiconductor technology; 1.8 micron; MOSFET mismatch; aluminium metal layers; asymmetric metal coverage; transistor pairs; Aluminum; Degradation; Intrusion detection; Large scale integration; MOS devices; MOSFET circuits; Pattern matching; Radio frequency; Routing; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Device Research Symposium, 2003 International
Print_ISBN :
0-7803-8139-4
Type :
conf
DOI :
10.1109/ISDRS.2003.1272201
Filename :
1272201
Link To Document :
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