InGaAs/InP heterojunction bipolar transistors with low offset voltage and current blocking

InGaAs/InP double heterojunction bipolar transistor with low offset voltage and low collector current blocking effect have been obtained using a combination of InGaAs spacers at the BE and BC junctions, and a highly doped n-type InP layer in the collector region. It is found that increasing the doping concentration of the n⁺-InP layer is more effective in lowering current blocking effect than increasing the InGaAs BC spacer thickness. Increasing base doping concentration is shown to be effective as well.