DocumentCode
405735
Title
Scalable elliptic curve encryption processor for portable application
Author
Chi Huang ; Jinmei Lai ; Junyan Ren ; Qianling Zhang
Author_Institution
ASIC & Syst. State Key Lab., Fudan Univ., China
Volume
2
fYear
2003
fDate
21-24 Oct. 2003
Firstpage
1312
Abstract
This paper presents the design and implementation of an energy efficient, scalable elliptic curve encryption processor over GF(2m) for portable application. The proposed processor contains three hierarchical controllers and one reconfigurable datapath to operate various finite field arithmetic. Scalable register is used to fit different elliptic curves and alterable field degree m (from 149 to 251), so the power is not wasted by the extra registers switching. In order to realize the reconfigurable architecture for portable application, we also adopt Montgomery´s affine algorithm, MSB-first bit-serial multiplication and an extended binary Euclidean algorithm to perform an inversion computation efficiently. The processor is implemented using 0.35 μm CMOS process. The core area is 2.75mm2 with the peak frequency of 100MHz. This processor do one point multiplication in 5.5 ms over GF(2251) and its maximum power consumption is only 13.6mW.
Keywords
CMOS integrated circuits; integrated circuit design; microprocessor chips; public key cryptography; reconfigurable architectures; 0.35 micron; 100 MHz; 13.6 mW; 5.5 ms; GF(2m); MSB-first bit-serial multiplication; Montgomery affine algorithm; extended binary Euclidean algorithm; finite field arithmetic; hierarchical controllers; inversion computation; point multiplication; reconfigurable architecture; reconfigurable datapath; scalable elliptic curve encryption processor; scalable register;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2003. Proceedings. 5th International Conference on
ISSN
1523-553X
Print_ISBN
0-7803-7889-X
Type
conf
DOI
10.1109/ICASIC.2003.1277458
Filename
1277458
Link To Document