Research on computing IP core for the digital signature algorithm

Polynomial multiplication with big integer coefficients over finite field is frequently used in some digital signature algorithms, in which this kind of calculation is the most time consuming part realized by software. This paper presents a new method (FFT/IFFT) and tries to solve it using FPGA. With the reduced calculation amount compared with normal algorithm and realized in hardware, it will greatly raise not only the performance of this calculation procedure but also the level of security. At the end of this paper, some intermediate results are given.