DocumentCode :
405803
Title :
TESTLINE: an IEEE P1500 compatible test scheme for SoC test
Author :
He Hu ; Sun Yihe
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing, China
Volume :
1
fYear :
2003
fDate :
21-24 Oct. 2003
Firstpage :
323
Abstract :
An IEEE P1500 compatible test scheme, TESTLINE, for modular SoC testing is presented in this paper. The test scheme consists of wrappers, TAM and User Defined Controller (UDC). For a given SoC, with specified parameters of modules and their tests, TESTLINE can optimize the testing time for the whole SoC using Integer Linear Programming (ILP). The ILP can efficiently determine the width of TAM and the assignment of modules to TAM. Experimental results for the ´ITC´02 SOC Test Benchmarks´ show that TESTLINE is an effective and efficient test scheme for SoC testing.
Keywords :
IEEE standards; integer programming; integrated circuit testing; linear programming; system-on-chip; IEEE P1500 compatible test; ILP; SoC test; TAM; TESTLINE; UDC; integer linear programming; system-on-chip test; test access mechanism; user defined controller;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
ISSN :
1523-553X
Print_ISBN :
0-7803-7889-X
Type :
conf
DOI :
10.1109/ICASIC.2003.1277553
Filename :
1277553
Link To Document :
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