Breakpoint debugging mechanism for microprocessor design

Using FPGA to model the design and test the functions of it in the real application systems is a key step in designing microprocessor. This paper presents a novel method named "hardware breakpoint debug in system" to shorten the time spent in FPGA modeling. This method supports to observe the internal states in the breakpoint and makes it easy to locate and solve the problems. Debugging process doesn\´t interface with normal operations. With a few modifications, the mechanism also supports some advanced debug function such as step trace, multi-breakpoint debug.