Design of high performance CMOS current-mode winner-take-all circuit

In this paper, we present a CMOS winner-take-all (WTA) circuit, which is well suited to large WTA systems where operating speed and power consumption are required. This circuit needs no additional dc current biasing and its power consumption is less than that of other current-mode WTA´s. In addition, the index of the winning input presented in the form of a binary word of dimension log₂N without any additional encoding circuit. Simulation results show that the proposed circuit is particularly suited to large-scale applications where low power and high speed are simultaneously required.