Title :
A novel receiver in high-speed serial data link
Author :
Haoliang Li ; Cui Mao ; Jun Xiong ; Changyou Men ; Lenian He ; Xiaolang Yan
Author_Institution :
Inst. of VLSI Design, Zhejiang Univ., Hangzhou, China
Abstract :
In this work, we proposed a novel receiver with three stages circuits, i.e., voltage-conversion, data-sampling and data-holding. The simulation results revealed that the receiver designed in this method reduced the rising and falling time of the input data from 700 ps to 140 ps in data-sampling circuit. It suggests that the accuracy and resolution for sampled data were improved.
Keywords :
data communication; receivers; sample and hold circuits; 700 to 140 ps; data holding; data sampling circuit; falling time; high speed serial data link; receiver; rising time; three stages circuits; voltage conversion;
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
Print_ISBN :
0-7803-7889-X
DOI :
10.1109/ICASIC.2003.1277626
