Title :
An embedded 200-Ms/s 8-bit 177mW folding and interpolating CMOS ADC in 0.25-mm2
Author :
Chen Cheng ; Ren Junyan ; Xu Jun
Author_Institution :
ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China
Abstract :
A CMOS folding and interpolating analog-to-digital converter (ADC) for embedded application is described. The circuit is fully compatible with standard digital CMOS technology. A modified folding block implemented without resistor contributes to a small chip area 475 μm × 526 μm. Offset averaging reduces the input capacitance. Fully-differential and open-loop analog circuitry is used to achieve high speed. The 200-Ms/s 8-bit ADC with 177mW total power consumption at 3.3V power supply is realized in standard digital 0.18 μm 3.3V CMOS technology.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; integrated circuit design; 0.18 micron; 177 mW; 3.3 V; chip area; complementary metal oxide semiconductor; embedded CMOS folding ADC; fully differential analog circuitry; input capacitance; integrated circuit design; interpolating analog to digital converter; modified folding block; offset averaging; open loop analog circuitry; power consumption; standard digital CMOS technology;
Conference_Titel :
ASIC, 2003. Proceedings. 5th International Conference on
Print_ISBN :
0-7803-7889-X
DOI :
10.1109/ICASIC.2003.1277635
