Substrate Bias Influence on the Operation of Junctionless Nanowire Transistors

Author

Trevisoli, Renan ; Trevisoli Doria, Rodrigo ; de Souza, Michelly ; Pavanello, Marcelo Antonio

Author_Institution

Centro Univ. da FEI, São Bernardo do Campo, Brazil

Volume

61

Issue

5

fYear

2014

fDate

May-14

Firstpage

1575

Lastpage

1582

Abstract

The aim of this paper is to analyze the substrate bias influence on the operation of junctionless nanowire transistors based on 3-D simulated and experimental results, accomplished by modeled data. The threshold voltage, the maximum transconductance, the subthreshold slope, the drain-induced barrier lowering (DIBL), and the I_ON/I_OFF ratio are the key parameters under analysis. It has been shown that the negative back bias can reduce the short-channel effects occurrence, improving the I_ON/I_OFF ratio and DIBL.

Keywords

field effect transistors; nanowires; semiconductor device models; DIBL; drain-induced barrier lowering; junctionless nanowire transistors; maximum transconductance; negative back bias; short channel effects; substrate bias; subthreshold slope; threshold voltage; Doping; Electric potential; Logic gates; Silicon; Substrates; Threshold voltage; Voltage measurement; Junctionless transistors; maximum transconductance; substrate bias; subthreshold slope; threshold voltage; threshold voltage.;

fLanguage

English

Journal_Title

Electron Devices, IEEE Transactions on

Publisher

ieee

ISSN

0018-9383

Type

jour

DOI

10.1109/TED.2014.2309334

Filename

6774929