• DocumentCode
    4072
  • Title

    Reduction of Negative Bias and Light Instability of a-IGZO TFTs by Dual-Gate Driving

  • Author

    Sejin Hong ; Suhui Lee ; Mativenga, Mallory ; Jin Jang

  • Author_Institution
    Dept. of Inf. Display, Kyung Hee Univ., Seoul, South Korea
  • Volume
    35
  • Issue
    1
  • fYear
    2014
  • fDate
    Jan. 2014
  • Firstpage
    93
  • Lastpage
    95
  • Abstract
    Stability under negative-bias-illumination-stress (NBIS) of dual-gate (top- and bottom-gate) amorphous-indium-gallium-zinc-oxide (a-IGZO) thin-film transistors is investigated. It is found that the negative threshold-voltage shift (ΔVTH) induced by NBIS is much smaller under dual-gate driving (when the two gates are electrically tied together) compared with single-gate driving. For a 20 nm-thick a-IGZO active layer, this is attributed to bulk accumulation, where electrons are accumulated across the entire depth of the active layer, which is responsible for the small negative ΔVTH after NBIS. Due to bulk accumulation, the Fermi level can be easily shifted by dual-gate driving as compared with the conventional single-gate driving, even after NBIS.
  • Keywords
    II-VI semiconductors; amorphous semiconductors; gallium compounds; indium compounds; thin film transistors; wide band gap semiconductors; zinc compounds; In-Ga-Zn-O; NBIS; a-IGZO TFTs; bulk accumulation; dual gate amorphous-indium-gallium-zinc-oxide thin-film transistors; dual-gate driving; negative bias reduction; negative threshold-voltage shift; negative-bias-illumination-stress; single-gate driving; size 20 nm; Logic gates; Semiconductor device measurement; Sputtering; Stress; Thin film transistors; Time measurement; TFT; a-IGZO; bulk accumulation; dual gate; negative bias illumination stress (NBIS);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2013.2290740
  • Filename
    6677564